How to Use a Latching Shift Register

Use an an electronic latch circuit to capture and lock shift register data.

Latching shift registers are a fundamental building block of electronic communication systems, as well as test and measurement systems. In these systems, a latching shift register is used to capture incoming data from a serial digital data stream at predefined intervals. Once the data is latched (captured), a microprocessor will read the data and either process it or store it in memory. Alternately, in a test and measurement system, the data captured is converted to an analog signal with a analog to digital converter (ADC).

Instructions

1. Apply a clock signal (a square wave with a 50 percent duty cycle) to the clock input of the shift register at a fixed frequency that is below the maximum clock frequency specification for the shift register.

2. Divide the "shift register clock frequency" by two and use this result for the frequency of the digital data stream. Generate the digital data stream signal with a waveform generator that is set to produce square waves at this calculated digital data stream frequency. Apply the digital data stream from the waveform generator to the serial input of the latching shift register.

3. Divide the shift register clock frequency by the number of shift register flip-flops used (most latching integrated circuits have 8 or 16 flop-flops that are connected directly to the input of 8 or 16 latches). Call this frequency the "latch clock frequency."

4. Delay the "latch clock frequency" (using a waveform generator or a delay circuit in the path of the latch clock line) to assure the latch clock pulses arrive after the register clock pulses. Set this delay time (shift clock to latch clock time) such that the time is longer than the "data-to-clock" delay specification for the shift register's flip-flops but shorter than one-half of the period of the "shift register clock frequency" used (divide 1 by the "shift register clock frequency" to obtain the period of the"shift register clock frequency").

Tips & Warnings

• Different latching shift registers have different functionality. Some shifting latch registers use transparent latches that will latch data when the latch enable (the latch clock) is high, others when the latch enable pin is low. Sometimes three-state buffers are used to disconnect the latch from the bus when the latch is disabled (not latched). You may have to adjust the delay of the latch clock line and the "serial data stream" to allow the data from the shift register and the data in the serial stream to settle before storing the data is stored in the register flip-flops and the output latches.

• Different latching shift registers often have unique AC electrical specifications that must be considered for the circuit to operate correctly. Improper use of electronic equipment and components can result in fire, serious injury or death. Always work under the supervision of a safety certified electronic technician or electronic engineer. Obtain an electronic safety certificate before you work with electronic equipment and components.

References

• Windomeadow Labs: Using a 74HC59N Shift Register Latch with an Atmel AVR
• Fairchild Semiconductor: 8-Bit Shift Register with Output Latches